DocumentCode
1823364
Title
Cascaded multilevel inverters fault control
Author
Farzaneh, A. ; Nazarzadeh, Jalal
Author_Institution
Sama Tech. & Vocational Training Coll., Islamic Azad Univ., Islamshahr, Iran
fYear
2011
fDate
8-10 Sept. 2011
Firstpage
164
Lastpage
168
Abstract
This paper proposes a new control method to increase cascaded multilevel inverters (GMl) efficiency at faulty condition. The influence of most probability fault on GMl with carrier based pulse width modulation (CBPWM) is investigated and the maximum output voltage is derived without elimination of faulty power cell. This method is able to produce balanced phase voltage on faulty phase. In addition proposed method can be used in the H-bridge cascaded multilevel inverter of any voltage levels. Simulation results are provided.
Keywords
PWM invertors; fault diagnosis; CBPWM; GMl efficiency; H-bridge cascaded multilevel inverter; balanced phase voltage; carrier based pulse width modulation; cascaded multilevel inverters fault control; fault condition; probability fault; Carrier based pulse width modulation; Multilevel inverters; Open circuit fault;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Machines and Power Electronics and 2011 Electromotion Joint Conference (ACEMP), 2011 International Aegean Conference on
Conference_Location
Istanbul
Print_ISBN
978-1-4673-5004-4
Electronic_ISBN
978-1-4673-5002-0
Type
conf
DOI
10.1109/ACEMP.2011.6490588
Filename
6490588
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