A bidirectional 64-channel neurochip for recording and stimulation neural network activity

We present the design and measurements of a novel 64 channel ASIC dedicated for recording and stimulation of neural network activity. Chip is designed in submicron CMOS 180nm technology, occupies 5×5 mm² of silicon area, and consumes only 25 μW/channel. The low cut-off frequency can be tuned in the range 60 mHz-100 Hz while the mean high cut-off frequency is 4.7 kHz or 12 kHz. The recording channel voltage gain may be also changed. Mean measurement values show it may be either 139 V/V or 1100 V/V. The measured input referenced noise is 3.7 μV rms in band 100 Hz-12 kHz and 7.6 μV rms in band 3 Hz-12 kHz. For the input signals amplitude 1.5 mV, the THD is 1%. In order to satisfy requirements concerning spread of the main parameters of the multichannel system, each channel is equipped with the two corrections DAC´s. These allow to obtain voltage gain equal to 139 V/V with the standard deviation std = 0.67 V/V, and low cut-off frequency equal to 60 mHz with the std = 30 mHz only. Each channel is equipped additionally with a stimulation circuits allowing to generate stimulation pulses in the 125 nA-512 μA current range with 8-bit resolution. All ASIC configurations are set thanks to on-chip digital register controlled by the on-chip LVDS receivers.