Design of a wideband filter-loaded output circuit

A wideband filter-loaded output circuit is designed and developed using 1-D and 3-D computer simulation codes. The RF design is generated using CPI´s 1-D RF large signal code and a goal curve for the output circuit gap interaction impedance is generated. The ANSYS 3-D HFSS code is used to design the filter-loaded output circuit hardware. Cold-test hardware is fabricated based on the 3-D simulation results. Cold-test results for this hardware are presented showing good correlation of the output circuit gap interaction impedance between the 1-D RF design goal and the hardware designed using 3-D code simulations. This new design and development process using both 1-D and 3-D code simulation is the first step in achieving reduced design cycle time in the development of wideband filter-loaded output circuits. The next step is to implement this output circuit hardware design in a functional wideband klystron to validate real RF power output performance.