DocumentCode :
1825237
Title :
A learning-based method to match a test pattern generator to a circuit-under-test
Author :
Pomeranz, Lrith ; Reddy, Sudhakar M.
Author_Institution :
Dept. of Electr. & Comput. Eng. Iowa Univ., Iowa City, IA, USA
fYear :
1993
fDate :
17-21 Oct 1993
Firstpage :
998
Lastpage :
1007
Abstract :
LFSRs are used as low-cost test pattern generators for circuits testable by pseudo-random patterns. We demonstrate that different LFSRs of the same degree, started from different initial states, may yield significantly different fault coverages and test lengths when used as test pattern generators for a given circuit, especially when the circuit is not fully testable by a practical number of pseudo-random patterns. A method to tailor an LFSR to a circuit-under-test is proposed, that attempts to select the most effective LFSR and initial state for the circuit. The method is based on a learning process that can be applied directly to certain classes of circuits. The learning process is also used to establish a collection of (primitive and non-primitive) LFSRs and initial states, effective for arbitrary circuits. Experimental results demonstrate the applicability of the proposed approach
Keywords :
automatic testing; fault diagnosis; learning (artificial intelligence); logic testing; random processes; shift registers; LFSR; circuit-under-test; fault coverages; learning; linear feedback shift register; low-cost; pseudo-random patterns; test lengths; test pattern generator; Automata; Automatic testing; Circuit faults; Circuit testing; Cities and towns; Hardware; Learning systems; Pattern matching; Shift registers; Test pattern generators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 1993. Proceedings., International
Conference_Location :
Baltimore, MD
Print_ISBN :
0-7803-1430-1
Type :
conf
DOI :
10.1109/TEST.1993.470599
Filename :
470599
Link To Document :
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