Rapid prototyping for a high data rate wireless local loop

Author

Rupp, Markus ; Beck, Eric ; Krishnamoorthy, Rajeev

Author_Institution

Bell Lab., Lucent Technol., Holmdel, NJ, USA

Volume

2

fYear

1999

fDate

24-27 Oct. 1999

Firstpage

993

Abstract

The development of a prototype for a fixed wireless loop system is reported. The TDMA based communication system allows flexible modulation schemes between QPSK and 64QAM in order to allow for dynamic bandwidth allocation. It is estimated that the overall complexity of the prototype is of the order of 10-100GOps. Since such a large complexity cannot be provided by existing DSPs, our prototype consists of a fast DSP, accompanied by several Altera Flex10K FPGAs. Complexity intensive algorithms are first evaluated on the DSP then moved onto the FPGAs in order to lower the load on the DSP. Such a structure allows very flexible reprogramming in C of initial algorithmic ideas and can be used to compare the performance as well as validate the implemented algorithms.

Keywords

bandwidth allocation; field programmable gate arrays; modems; quadrature amplitude modulation; quadrature phase shift keying; radio access networks; software prototyping; time division multiple access; 64QAM; Altera Flex10K FPGA; C language; DSP; QPSK; TDMA based communication system; complexity intensive algorithms; dynamic bandwidth allocation; fast DSP; fixed wireless loop system; high data rate wireless local loop; modem; modulation; performance; rapid prototyping; reprogramming; Bandwidth; Channel allocation; Digital signal processing; Filters; Hardware; Prototypes; Pulse modulation; Quadrature phase shift keying; Time division multiple access; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

Signals, Systems, and Computers, 1999. Conference Record of the Thirty-Third Asilomar Conference on

Conference_Location

Pacific Grove, CA, USA

ISSN

1058-6393

Print_ISBN

0-7803-5700-0

Type

conf

DOI

10.1109/ACSSC.1999.831858

Filename

831858