Title :
Terminating transmission lines in the test environment
Author :
Herlein, Richard F.
Author_Institution :
Schlumberger Technol., San Jose, CA, USA
Abstract :
Improperly terminating transmission lines in the test environment will cause significant time-measurement errors, especially when the CMOS devices being tested generate narrow pulses. Comparing various termination techniques suggests new tester and IC design methodologies
Keywords :
CMOS integrated circuits; SPICE; integrated circuit design; integrated circuit interconnections; integrated circuit testing; measurement errors; CMOS devices; CMOSIC; IC design methodologies; SPICE; Z clamp; driver; hard clamp; programmable load; test environment; time-measurement errors; transmission lines; CMOS technology; Circuit testing; Distributed parameter circuits; Impedance; Integrated circuit interconnections; Multichip modules; System testing; Timing; Transmission lines; Voltage;
Conference_Titel :
Test Conference, 1993. Proceedings., International
Conference_Location :
Baltimore, MD
Print_ISBN :
0-7803-1430-1
DOI :
10.1109/TEST.1993.470606
