Title :
A BIST scheme for an SNR test of a sigma-delta ADC
Author :
Toner, M.F. ; Roberts, G.W.
Author_Institution :
Dept. of Electr. Eng., McGill Univ., Montreal, Que., Canada
Abstract :
Built-In-Self-Test (BIST) for VLSI systems is desirable in order to reduce the cost per chip of production-time testing by the manufacturer. In addition, it can provide the means to perform in-the-field diagnostics. This paper discusses a mixed analog-digital BIST (MADBIST) for a signal-to-noise-ratio test of an analog-to-digital converter. The MAD-BIST strategy for the SNR test of the A/D converter is introduced, accuracy issues are discussed, and experimental results are presented
Keywords :
VLSI; analogue-digital conversion; built-in self test; economics; integrated circuit manufacture; integrated circuit testing; mixed analogue-digital integrated circuits; production testing; sigma-delta modulation; BIST; IEEE standards; SNR test; VLSI; cost per chip; in-the-field diagnostics; production-time testing; sigma-delta ADC; Analog-digital conversion; Built-in self-test; Circuit testing; Costs; Delta-sigma modulation; Filters; Integrated circuit testing; Signal to noise ratio; System testing; Test equipment;
Conference_Titel :
Test Conference, 1993. Proceedings., International
Conference_Location :
Baltimore, MD
Print_ISBN :
0-7803-1430-1
DOI :
10.1109/TEST.1993.470621
