DocumentCode :
1825906
Title :
Error-speed compromise for FFT VLSI
Author :
Vacher, A. ; Guyot, A.
Author_Institution :
TIMA Lab., CNRS, Grenoble, France
fYear :
1994
fDate :
20-22 Mar 1994
Firstpage :
659
Lastpage :
662
Abstract :
The Fourier transform is very used for its properties and because the fast fourier Transform (FFT) algorithm has allowed speeding up computations. Each step of it introduces an error caused first by the quantization of the sine and cosine coefficients, second by the necessarily limited size-increase of the results. The roundoff-phenomenon has much more important effects than the coefficient-imprecision. The arithmetic unit can treat numbers either sufficiently large to maximize the accuracy or smaller to minimize the area, in the case of parallel operators, or the computation time, in the case of serial operators. Using the properties of the serial operators, the authors propose a way to approach the first without going too far from the second and propose an architecture to implement it in VLSI
Keywords :
VLSI; digital arithmetic; digital signal processing chips; fast Fourier transforms; parallel architectures; roundoff errors; FFT VLSI; architecture; arithmetic unit; coefficient-imprecision; computation time; cosine coefficients; error-speed compromise; fast fourier Transform; parallel operator; quantization; roundoff-phenomenon; serial operators; sine coefficients; Adaptive filters; Arithmetic; Digital signal processing; Fast Fourier transforms; Fourier transforms; Hardware; Laboratories; Quantization; Signal processing algorithms; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
System Theory, 1994., Proceedings of the 26th Southeastern Symposium on
Conference_Location :
Athens, OH
ISSN :
0094-2898
Print_ISBN :
0-8186-5320-5
Type :
conf
DOI :
10.1109/SSST.1994.287795
Filename :
287795
Link To Document :
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