DocumentCode
1826014
Title
Testability features of the SuperSPARC microprocessor
Author
Patel, Rajiv ; Yarlagadda, Krishna
Author_Institution
Sun Microsyst. Inc., Mountain View, CA, USA
fYear
1993
fDate
17-21 Oct 1993
Firstpage
773
Lastpage
781
Abstract
The Texas Instruments SuperSPARC is a high performance BiCMOS superscalar microprocessor containing 3.1 M transistors. This paper describes the testability features of this highly integrated processor aiming towards achieving a highly manufacturable design. Many of the features described can also be used to test the chip in a system environment. The discussion also includes test pattern generation methods and tools used in generating the test vectors. Pitfalls and benefits of the techniques used have been summarized in the final section
Keywords
BiCMOS integrated circuits; Texas Instruments computers; design for testability; microprocessor chips; production testing; BiCMOS superscalar microprocessor; SuperSPARC microprocessor; TI computers; Texas Instruments; design for testability; test pattern generation; Clocks; Coherence; Flip-flops; Floating-point arithmetic; Logic design; Microprocessors; Pipelines; Prefetching; Registers; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 1993. Proceedings., International
Conference_Location
Baltimore, MD
Print_ISBN
0-7803-1430-1
Type
conf
DOI
10.1109/TEST.1993.470625
Filename
470625
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