• DocumentCode
    1826111
  • Title

    ALWP: A Workload Partition Method for the Efficient Parallel Simulation of Manycores

  • Author

    Jiao, Shuai ; Wang, Da ; Ye, Xiaochun ; Xu, Weizhi ; Zhang, Hao ; Sun, Ninghui

  • Author_Institution
    Key Lab. of Comput. Syst. & Archit., Inst. of Comput. Technol. (ICT), Beijing, China
  • fYear
    2012
  • fDate
    25-27 June 2012
  • Firstpage
    135
  • Lastpage
    142
  • Abstract
    This paper addresses the workload partition strategies in simulating many-core architectures. The key observation behind this paper is: compared to multicore, manycore features with more non-uniform memory access and unpredictable network traffic; these features degrade simulation speed and accuracy of parallel discrete event simulators (PDES) in cases of static workload partition schemes. Based on the observation, an adaptive workload partition method is proposed: Adaptive Link-based Workload Partition (ALWP). The proposed method can deliver more speedup and accuracy than traditional static partition schemes. It achieves this ability by placing the partitioning border prior on less interactive links. Using a PDES simulator, we evaluate the performance of ALWP in simulating a 256-core general purpose many-core processor. Running SPLASH2 benchmark applications, the experimental results demonstrate that, compared to static scheme, ALWP can deliver speed improvement by 14%~42% and reduce more timing errors (>;50%) in relaxed cases.
  • Keywords
    discrete event simulation; multiprocessing systems; parallel architectures; performance evaluation; 256-core general-purpose manycore processor; ALWP; PDES; PDES simulator; SPLASH2 benchmark applications; adaptive link-based workload partition; interactive links; manycore architecture simulation; multicore feature; network traffic; nonuniform memory access; parallel discrete event simulators; parallel simulation; performance evaluation; simulation speed degradation; static workload partition scheme; timing errors; Accuracy; Adaptation models; Computational modeling; Multicore processing; Synchronization; Tiles; Many-core; Multi-core; Parallel Discret Event Simulation; Workload Partition;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    High Performance Computing and Communication & 2012 IEEE 9th International Conference on Embedded Software and Systems (HPCC-ICESS), 2012 IEEE 14th International Conference on
  • Conference_Location
    Liverpool
  • Print_ISBN
    978-1-4673-2164-8
  • Type

    conf

  • DOI
    10.1109/HPCC.2012.27
  • Filename
    6332169