• DocumentCode
    1826441
  • Title

    Performances of Wafer-Level UnderFill with 50µm pitch interconnections: Comparison with conventional underfill

  • Author

    Taluy, Alisée ; Lhostis, Sandrine ; Jouve, Amandine ; Garnier, Gennie ; Dezandre, Emilienne ; Farcy, Alexis ; Chéramy, Séverine ; Sillon, Nicolas ; Sylvestre, Alain

  • Author_Institution
    STMicroelectron., Crolles, France
  • fYear
    2011
  • fDate
    7-9 Dec. 2011
  • Firstpage
    129
  • Lastpage
    134
  • Abstract
    This paper deals with the performances of Wafer-Level UnderFill in ultra-fine 50 microns pitch interconnections. Firstly, dry-film WLUF assembly feasibility has been demonstrated by checking lamination and planarity in the pillar areas. Well-formed Pb-free joints have been obtained after thermocompression with limited void or WLUF entrapment. Secondly, to have a better understanding of this innovative material performances during thermal and moisture tests, the electrical behavior of Copper pillars chains surrounded by WLUF has been compared with those surrounded by classic Capillary Underfill used in the semiconductor industry. We have successfully demonstrated that chains surrounded by WLUF are stable during JEDEC level 4 preconditioning and moisture storage. During thermal cycling, behavior variation of chains surrounded by WLUF has been observed, depending on interconnects quantity. However, electrical performances of the longest 100 pillars chain respond to industrial specifications and are similar for both underfill. After thermal and moisture tests, a good adhesion of WLUF stacks has been verified by shear tests. Those results have demonstrated the pertinence of this innovative WLUF material with 50μm pitch interconnections.
  • Keywords
    copper; integrated circuit interconnections; solders; thermal management (packaging); wafer level packaging; JEDEC level 4 preconditioning; Pb-free joints; WLUF entrapment; adhesion; capillary underfill; copper; dry-film WLUF assembly; electrical behavior; lamination; moisture storage; moisture test; planarity; shear test; size 50 micron; thermal cycling; thermal test; thermocompression; ultrafine 50 microns pitch interconnection; wafer-level underfill; Copper; Moisture; Polymers; Resins; Resistance; Silicon;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics Packaging Technology Conference (EPTC), 2011 IEEE 13th
  • Conference_Location
    Singapore
  • Print_ISBN
    978-1-4577-1983-7
  • Electronic_ISBN
    978-1-4577-1981-3
  • Type

    conf

  • DOI
    10.1109/EPTC.2011.6184400
  • Filename
    6184400