DocumentCode
1826872
Title
Realizing a high measure of confidence for defect level analysis of random testing
Author
Gondalia, Paresh ; Gutjahr, Allan ; Jone, Wen-Ben
Author_Institution
ATT Universal Card Services, Jacksonville, FL, USA
fYear
1993
fDate
17-21 Oct 1993
Firstpage
478
Lastpage
487
Abstract
The defect level in circuit testing is the percentage of circuits, such as chips, which are defective and shipped for use after testing. In this work, it is demonstrated that the defect level of testing a circuit using random patterns should have a probability distribution rather than just a single value. Based on this concept, the confidence degree of a specified defect level for random testing is thus guaranteed. Yield value is one of the parameters for defect level analysis, and methods for yield estimation are proposed. The performance of these methods is evaluated using both Monte Carlo simulation and theoretical analyses. Experiments using computer simulation have been conducted for this work, and the results are very encouraging
Keywords
Monte Carlo methods; digital simulation; fault location; integrated circuit testing; integrated circuit yield; probability; random processes; IC testing; Monte Carlo simulation; circuit testing; computer simulation; confidence; confidence degree; defect level analysis; probability distribution; random patterns; random testing; theoretical analyses; yield estimation; Circuit faults; Circuit testing; Computer science; Computer simulation; Fabrication; Information analysis; Mathematics; Performance analysis; Probability distribution; Yield estimation;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 1993. Proceedings., International
Conference_Location
Baltimore, MD
Print_ISBN
0-7803-1430-1
Type
conf
DOI
10.1109/TEST.1993.470663
Filename
470663
Link To Document