Title :
An Adaptative Multi-GPU Based Branch-and-Bound. A Case Study: The Flow-Shop Scheduling Problem
Author :
Chakroun, I. ; Melab, N.
Author_Institution :
LIFL, Univ. Lille 1, Villeneuve d´´Ascq, France
Abstract :
Solving exactly Combinatorial Optimization Problems (COPs) using a Branch-and-Bound (B&B) algorithm requires a huge amount of computational resources. Therefore, we recently investigated designing B&B algorithms on top of graphics processing units (GPUs) using a parallel bounding model. The proposed model assumes parallelizing the evaluation of the lower bounds on pools of sub-problems. The results demonstrated that the size of the evaluated pool has a significant impact on the performance of B&B and that it depends strongly on the problem instance being solved. In this paper, we design an adaptative parallel B&B algorithm for solving permutation-based combinatorial optimization problems such as FSP (Flow-shop Scheduling Problem) on GPU accelerators. To do so, we propose a dynamic heuristic for parameter auto-tuning at runtime. Another challenge of this pioneering work 1 is to exploit larger degrees of parallelism by using the combined computational power of multiple GPU devices. The approach has been applied to the permutation flow-shop problem. Extensive experiments have been carried out on well-known FSP benchmarks using an Nvidia Tesla S1070 Computing System equipped with two Tesla T10 GPUs. Compared to a CPU-based execution, accelerations up to ×105 are achieved for large problem instances.
Keywords :
flow shop scheduling; graphics processing units; mathematics computing; optimisation; parallel algorithms; tree searching; COP; FSP; GPU accelerators; Nvidia Tesla S1070 Computing System; Tesla T10 GPU; adaptative multiGPU based branch-and-bound algorithm; adaptative parallel B&B algorithm; combinatorial optimization problems; computational resources; flow-shop scheduling problem; graphics processing units; lower bounds; parallel bounding model; parameter autotuning; problem solving; Algorithm design and analysis; Graphics processing unit; Heuristic algorithms; Instruction sets; Kernel; Parallel processing; Scheduling; Branch-and-Bound Algorithms; Flow-Shop Scheduling Problem; Multi-GPU Computing; Parallel Bounding;
Conference_Titel :
High Performance Computing and Communication & 2012 IEEE 9th International Conference on Embedded Software and Systems (HPCC-ICESS), 2012 IEEE 14th International Conference on
Conference_Location :
Liverpool
Print_ISBN :
978-1-4673-2164-8
DOI :
10.1109/HPCC.2012.59