DocumentCode
1827111
Title
Memory Efficient Parallelization for Aho-Corasick Algorithm on a GPU
Author
Tran, Nhat-Phuong ; Lee, Myungho ; Hong, Sugwon ; Shin, Minho
Author_Institution
Dept. of Comput. Sci. & Eng., Myongji Univ., Yongin, South Korea
fYear
2012
fDate
25-27 June 2012
Firstpage
432
Lastpage
438
Abstract
Pattern matching is a commonly used operation in many applications including image processing, computer and network security, bioinformatics, among many others. Aho-Corasick (AC) algorithm is one of the well-known pattern matching techniques and it is intensively used in computer and network security. In order to meet the real-time performance requirements imposed on these security applications, developing a high-speed parallelization technique is essential for the AC algorithm. In this paper, we present a new memory efficient parallelization technique which efficiently places and caches the input text data and the reference data in the on-chip shared memories and texture caches of the Graphic Processing Unit (GPU). Furthermore, the new approach efficiently schedules memory accesses in order to minimize the overhead in loading data to the on-chip shared memories. The approach cuts down the effective memory access latencies and leads to significant performance improvements. Experimental results on Nvidia GeForce 9500GT GPU shows up to 15-times speedup compared with a serial version on 2.2Ghz Core2Duo Intel processor, and 15Gbps throughput performance.
Keywords
cache storage; computer network security; graphics processing units; parallel algorithms; pattern matching; real-time systems; shared memory systems; AC algorithm; Aho-Corasick algorithm; Core2Duo Intel processor; GPU; Nvidia GeForce 9500GT GPU; bioinformatics; graphic processing unit; high-speed parallelization technique; image processing; input text data caches; memory access latencies; memory accesses scheduling; memory efficient parallelization; memory efficient parallelization technique; network security; on-chip shared memories; pattern matching techniques; real-time performance; security applications; texture caches; AC machines; Algorithm design and analysis; Doped fiber amplifiers; Graphics processing unit; Instruction sets; Memory management; Pattern matching; Aho-Corasick algorithm; GPU; computer security; parallelization;
fLanguage
English
Publisher
ieee
Conference_Titel
High Performance Computing and Communication & 2012 IEEE 9th International Conference on Embedded Software and Systems (HPCC-ICESS), 2012 IEEE 14th International Conference on
Conference_Location
Liverpool
Print_ISBN
978-1-4673-2164-8
Type
conf
DOI
10.1109/HPCC.2012.65
Filename
6332204
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