Title :
Residue number system reconfigurable datapath
Author :
Cardarilli, Gian Carlo ; Del Re, A. ; Nannarelli, Alberto ; Re, Marco
Author_Institution :
Dept. of Electr. Eng., Tor Vergata Univ., Rome, Italy
Abstract :
In this paper we describe a possible approach to implement a reconfigurable datapath for digital signal processing. The datapath should be programmable in terms of dynamic range, type and sequence of operations. We chose to implement it in the Residue Number System (RNS), because the RNS offers high speed and low power dissipation. Results show that the RNS reconfigurable datapath offers better performance and lower power dissipation when compared, on the same set of applications, with a traditional FIR filter of the same characteristics
Keywords :
FIR filters; convolution; digital signal processing chips; low-power electronics; pattern matching; reconfigurable architectures; residue number systems; FIR filter; RNS reconfigurable datapath; bidimensional convolution; digital signal processing; dynamic range; high speed; low power dissipation; operation sequence; pattern matching; programmable datapath; residue number system reconfigurable datapath; Application software; Control systems; Costs; Digital signal processing; Dynamic range; Field programmable gate arrays; Finite impulse response filter; Hardware; Power dissipation; Prototypes;
Conference_Titel :
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Conference_Location :
Phoenix-Scottsdale, AZ
Print_ISBN :
0-7803-7448-7
DOI :
10.1109/ISCAS.2002.1011463
