Title :
Algorithms for cost optimised test strategy selection
Author :
Dislis, C. ; Dick, J. ; Ambler, A.P.
Author_Institution :
Dept. of Electr. Eng. & Electron., Brunel Univ., Uxbridge, UK
Abstract :
This paper describes a system which aids designers in the selection of economically optimal design for testability strategies. The approach recognizes that design for testability decisions taken for parts of the circuit affect subsequent decisions for the design as a whole. Economics models are used to objectively evaluate strategies, and a set of algorithms is presented which provide efficient methods for searching the test strategy space. Different approaches are compared and a novel use of simulated annealing for test strategy planning is presented. Examples on real designs are given, with an indication of CPU time and computational complexity
Keywords :
circuit CAD; computational complexity; design for testability; economics; integrated circuit manufacture; integrated circuit testing; simulated annealing; CPU time; PLA; RAM; computational complexity; cost optimised test strategy selection; design for testability; economically optimal design; exhaustive search; random sequential node; real designs; simulated annealing; test strategy planning; Algorithm design and analysis; Circuit faults; Circuit simulation; Circuit testing; Cost function; Design for testability; Economic forecasting; Simulated annealing; Strategic planning; System testing;
Conference_Titel :
Test Conference, 1993. Proceedings., International
Conference_Location :
Baltimore, MD
Print_ISBN :
0-7803-1430-1
DOI :
10.1109/TEST.1993.470674