The impact of device leakage on digital circuits

Author

Secareanu, Radu M. ; Maniar, Papu

Author_Institution

Semicond. Products Sector, Motorola Inc., Tempe, AZ, USA

Volume

2

fYear

2002

fDate

2002

Abstract

The impact of device leakage on the operation of conventional static and dynamic digital circuits is presented. Particular focus is on signal integrity, performance degradation, and power dissipation. A first order estimation regarding the expected circuit and system performances for a technology from a leakage standpoint can be defined based on the developed results. Developing an early guidance and discrimination methodology for device design is another target. The ultimate limits for device leakage for any trade-offs among the signal integrity, performance degradation, and power dissipation, can be estimated for any given technology

Keywords

digital integrated circuits; integrated circuit design; integrated circuit reliability; leakage currents; parameter estimation; semiconductor device models; circuit performances; design trade-offs; device design guidance/discrimination methodology; device leakage; device technology; dynamic digital circuits; first order estimation; performance degradation; power dissipation; signal integrity; static digital circuits; system performances; Circuits and systems; Conducting materials; Degradation; Digital circuits; Logic; MOS devices; Power dissipation; Signal analysis; Subthreshold current; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on

Conference_Location

Phoenix-Scottsdale, AZ

Print_ISBN

0-7803-7448-7

Type

conf

DOI

10.1109/ISCAS.2002.1011469

Filename

1011469