Title :
Beta expansions: a new approach to digitally corrected A/D conversion
Author :
Daubechies, I. ; DeVore, R. ; Güntürk, C.S. ; Vaishampayan, V.A.
Author_Institution :
Dept. of Math., Princeton Univ., NJ, USA
Abstract :
We introduce a new architecture for pipelined (and also algorithmic) A/D converters that give exponentially accurate conversion using inaccurate comparators. An error analysis of a sigma-delta converter with an imperfect comparator and a constant input reveals a self-correction property that is not inherited by the successive refinement quantization algorithm that underlies both pipelined multistage A/D converters and algorithmic A/D converters. Motivated by this example, we introduce a new A/D converter, the beta converter, which has the same self-correction property as a sigma-delta converter but which exhibits higher order (exponential) accuracy with respect to the bit rate as compared to a sigma-delta converter, which exhibits only polynomial accuracy
Keywords :
comparators (circuits); error analysis; error correction; pipeline processing; quantisation (signal); sigma-delta modulation; A/D converter architecture; algorithmic A/D converters; beta converter; beta expansions; bit rate; constant input; digitally corrected A/D conversion; exponentially accurate conversion; imperfect comparator; pipelined A/D converters; pipelined multistage A/D converters; refinement quantization algorithm; self-correction property; sigma-delta converter error analysis; Computer architecture; Delta-sigma modulation; Error analysis; Error correction; Fourier transforms; Mathematics; Quantization; Redundancy; Sampling methods; Voltage;
Conference_Titel :
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Conference_Location :
Phoenix-Scottsdale, AZ
Print_ISBN :
0-7803-7448-7
DOI :
10.1109/ISCAS.2002.1011470