A fast and accurate calibration method for high-speed high-resolution pipeline ADC

This paper presents a new calibration method, which can calibrate a high-resolution pipelined ADC quickly and accurately by measuring only tens of samples. This eases the design of high-resolution pipelined ADCs for high-speed applications. The generalized mathematical model of a pipelined ADC including circuit nonidealities, which leads to the new calibration method, is derived. A practical implementation of this method is also proposed, which includes only an adder and some shifters. It can be realized either by off-chip DSP or by an on-chip mixed-signal design. Finally, extensive simulation results prove the robustness and accuracy of this method