Title :
Very-low-voltage testing for weak CMOS logic ICs
Author :
Hao, Hong ; McCluskey, Edward J.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Stanford Univ., CA, USA
Abstract :
In this paper we propose a very-low-voltage (VLV) testing technique for CMOS logic ICs. Voltage dependence of CMOS logic circuit operation in the presence of resistive shorts and hot carrier damage is studied. It is shown that at certain much-lower-than-normal power supply voltage, weak CMOS logic ICs due to the presence of these flaws can be forced to malfunction while truly good ICs continue to function. Very-low-voltage testing also detects pattern dependent faults caused by resistive shorts. Because of its simplicity and because there is no overhead associated with it, very-low-voltage testing can easily be applied to chips and circuit boards as a production test, field test, or failure diagnosis technique
Keywords :
CMOS integrated circuits; fault diagnosis; integrated circuit testing; integrated logic circuits; logic testing; printed circuit testing; production testing; short-circuit currents; CMOS logic ICs; failure diagnosis; field test; hot carrier damage; production test; resistive shorts; very low voltage testing; CMOS logic circuits; CMOS technology; Circuit faults; Circuit testing; Electrical fault detection; Fault detection; Hot carriers; Logic testing; Power supplies; Voltage;
Conference_Titel :
Test Conference, 1993. Proceedings., International
Conference_Location :
Baltimore, MD
Print_ISBN :
0-7803-1430-1
DOI :
10.1109/TEST.1993.470686
