DocumentCode
1828095
Title
Electrical analysis of unbalanced Flash memory array construction effects and their impact on performance and reliability
Author
Seidel, K. ; Müller, T. ; Brandt, T. ; Hoffmann, R. ; Löhr, D.A. ; Melde, T. ; Czernohorsky, M. ; Paul, J. ; Beyer, V.
Author_Institution
Fraunhofer Center Nanoelectronic Technol., Dresden, Germany
fYear
2009
fDate
25-28 Oct. 2009
Firstpage
72
Lastpage
76
Abstract
In our work we present statistical methods and new memory array analysis approaches for decomposition and assessment of contributors to the Vth distribution widening. There, cell threshold voltage characteristics along bitlines and wordlines are considered as well as hidden systematic effects by convolutional analysis. Based on investigations on sub-50 nm floating gate NAND memory arrays we demonstrate an analysis method to distinguish between different reasons for broadened distributions by means of memory map analysis algorithms and filters. The impact of systematic threshold voltage and cell current variation in memory arrays caused by intrinsic circuit properties will be discussed.
Keywords
NAND circuits; circuit reliability; convolution; flash memories; statistical analysis; cell current variation; convolutional analysis; distribution widening; electrical analysis; floating gate NAND memory arrays; memory map analysis algorithms; systematic threshold voltage; unbalanced flash memory array construction effects; Electron traps; Flash memory; Nonvolatile memory; Performance analysis; Pulse measurements; Size measurement; Stress; Telegraphy; Testing; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Non-Volatile Memory Technology Symposium (NVMTS), 2009 10th Annual
Conference_Location
Portland, OR
Print_ISBN
978-1-4244-4953-8
Electronic_ISBN
978-1-4244-4954-5
Type
conf
DOI
10.1109/NVMT.2009.5429789
Filename
5429789
Link To Document