DocumentCode :
1828403
Title :
1/f noise of NMOS and PMOS transistors and their implications to design of voltage controlled oscillators
Author :
O, K.K. ; Namkyu Park ; Dong-Jun Yang
Author_Institution :
Dept. of Electr. & Comput. Eng., Florida Univ., Gainesville, FL, USA
fYear :
2002
fDate :
3-4 June 2002
Firstpage :
59
Lastpage :
62
Abstract :
Low frequency noise of NMOS and PMOS transistors in a 0.25 /spl mu/m foundry CMOS process with a pure SiO/sub 2/ gate oxide layer is characterized for the entire range of MOSFET operation. Surprisingly, the measurement results showed that surface channel PMOS transistors have about an order of magnitude lower 1/f noise than NMOS transistors especially at V/sub GS/-V/sub TH/ less than /spl sim/0.4 V The data were used to show that a VCO using all surface channel PMOS transistors can have /spl sim/14 dB lower close-in phase noise compared to that for a VCO using all surface channel NMOS transistors.
Keywords :
1/f noise; MMIC oscillators; MOS analogue integrated circuits; MOSFET; field effect MMIC; integrated circuit noise; microwave field effect transistors; phase noise; semiconductor device noise; voltage-controlled oscillators; 0.25 micron; 1/f noise; MOSFET operation; NMOS transistors; PMOS transistors; SiO/sub 2/; VCO design; close-in phase noise; low frequency noise; n-channel MOSFET; p-channel MOSFET; pure SiO/sub 2/ gate oxide layer; surface channel NMOSFET; surface channel PMOSFET; voltage controlled oscillator design; CMOS process; Communication system control; Integrated circuit noise; Low-frequency noise; MOS devices; MOSFETs; Phase noise; Silicon; Voltage control; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radio Frequency Integrated Circuits (RFIC) Symposium, 2002 IEEE
Conference_Location :
Seattle, WA, USA
ISSN :
1529-2517
Print_ISBN :
0-7803-7246-8
Type :
conf
DOI :
10.1109/RFIC.2002.1011510
Filename :
1011510
Link To Document :
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