• DocumentCode
    1829923
  • Title

    Speculative Versioning through Perceptron Predictors

  • Author

    Atoofian, Ehsan ; Bavarsad, Amir Ghanbari

  • Author_Institution
    Electr. Eng., Lakehead Univ., Thunder Bay, ON, Canada
  • fYear
    2012
  • fDate
    25-27 June 2012
  • Firstpage
    1125
  • Lastpage
    1130
  • Abstract
    A well-know method to avoid inconsistent state in Software Transactional Memory (STM) is a globally shared version clock whose values are used to tag memory locations. While this method does not require frequent validation of transactional data, it results in contentions over the global clock. Each time that a transaction commits it updates the global clock which results in costly coherence misses. The alternative approach is local clock which requires access to local variables instead of a global version clock. However, as we show in this paper, the optimum validation policy changes not only across applications but also within an application and through different phases of a program. To counter this challenge, we introduce Speculative Versioning (SV) which dynamically selects one of the two validation techniques based on probability of conflicts. SV is a speculative approach and relies on perceptron predictors to predict future conflicts. We have incorporated SV into TL2 and compared the performance of the new implementation with the original STM using Stamp v0.9.10 benchmark suite. Our results reveal that SV is effective and improves execution time of transactional applications up to 31%.
  • Keywords
    clocks; parallel programming; perceptrons; probability; program verification; storage management; STM; SV; Stamp v0.9.10 benchmark suite; TL2; conflict probability prediction; dynamic validation technique selection; execution time improvement; global clock; local clock variables; memory location tagging; optimum validation policy; perceptron predictors; software transactional memory; speculative versioning; Accuracy; Benchmark testing; Bioinformatics; Clocks; Genomics; History; Vectors; Global Clock; Perceptron Predictor; Transactional Memory;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    High Performance Computing and Communication & 2012 IEEE 9th International Conference on Embedded Software and Systems (HPCC-ICESS), 2012 IEEE 14th International Conference on
  • Conference_Location
    Liverpool
  • Print_ISBN
    978-1-4673-2164-8
  • Type

    conf

  • DOI
    10.1109/HPCC.2012.165
  • Filename
    6332300