Time distributed DCT architecture for multimedia applications

This paper presents the design of a new time distributed architecture (TDA), which outlines architecture submitted to MPEG4 Part9 committee ISO/IEC JTC1/SC29/WG11 MPEG2002/M8565. The proposed TDA optimizes the 2D-DCT performance. It uses a time distribution mechanism to exploit the computational redundancy within the inner product computation module. It schedules the computation to meet the application specific requirements of input, output and coefficients word length. The Coefficient matrix uses linear mappings to assign necessary computation to processor elements in the space and the time domains. The performance analysis shows a performance savings in excess of 71% as compared to the current optimized general and application specific architectures for DCT is achieved.