A novel topology in RNMC amplifiers with single miller compensation capacitor

Author

Jalalifar, Majid ; Yavari, Mohammad ; Raissi, Farshid

Author_Institution

Dept. of Electr. Eng., K.N. Toosi Univ. of Technol., Tehran

fYear

2008

fDate

18-21 May 2008

Firstpage

296

Lastpage

299

Abstract

This paper presents a reversed single active Miller compensation (RSAMC) technique for low-voltage and large capacitive load three-stage amplifiers. In this scheme, only one active compensation capacitor is employed. The main advantages of the proposed compensation method are the enhanced unity gain bandwidth and reduced silicon die area of the amplifier compared to those of the existing proposed techniques in reversed nested Miller compensation (RNMC) scheme. The simulation results with a 0.18 mum standard CMOS process achieve 27 MHz unity gain bandwidth and 60 degree phase margin for the proposed RSAMC amplifier, while driving 500 pF load from a single 1.5 V power supply.

Keywords

CMOS analogue integrated circuits; amplifiers; capacitors; network topology; CMOS process; RNMC amplifiers; active compensation capacitor; bandwidth 27 MHz; capacitance 500 pF; large capacitive load three-stage amplifiers; low-voltage amplifiers; reversed nested Miller compensation; single Miller compensation capacitor; size 0.18 mum; unity gain bandwidth; voltage 1.5 V; Bandwidth; CMOS technology; Capacitors; Circuits; Frequency; Power amplifiers; Power supplies; Resistors; Topology; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on

Conference_Location

Seattle, WA

Print_ISBN

978-1-4244-1683-7

Electronic_ISBN

978-1-4244-1684-4

Type

conf

DOI

10.1109/ISCAS.2008.4541413

Filename

4541413