A 500MHz blind classification processor for cognitive radios in 40nm CMOS

Author

Fang-Li Yuan ; Tsung-Han Yu ; Markovic, Dejan

Author_Institution

Univ. of California, Los Angeles, Los Angeles, CA, USA

fYear

2014

fDate

10-13 June 2014

Firstpage

1

Lastpage

2

Abstract

A blind classification processor for cognitive radios is realized in 40nm CMOS, featuring three-step parameter estimation for a 59× energy saving compared to an exhaustive method, and multi-algorithm feature extraction to distinguish five modulation classes: multicarrier, single-carrier PSK/QAM/MSK, and spread-spectrum signals. The chip consumes 17μJ within 2ms sensing time per classification, achieving ≥95% detection probability (P_D) and ≤0.5% false-alarm rate (PFA) at 10dB SNR in a 500MHz channel.

Keywords

CMOS integrated circuits; UHF integrated circuits; cognitive radio; feature extraction; minimum shift keying; parameter estimation; phase shift keying; quadrature amplitude modulation; signal classification; spread spectrum communication; CMOS process; PFA; blind classification processor; cognitive radios; detection probability; energy 17 muJ; energy saving; false-alarm rate; frequency 500 MHz; multialgorithm feature extraction; multicarrier signal; single-carrier PSK-QAM-MSK; size 40 nm; spread-spectrum signals; three-step parameter estimation; time 2 ms; CMOS integrated circuits; Cognitive radio; Energy efficiency; Engines; Feature extraction; Sensors; Signal to noise ratio; blind signal classification; cognitive radios;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Circuits Digest of Technical Papers, 2014 Symposium on

Conference_Location

Honolulu, HI

Print_ISBN

978-1-4799-3327-3

Type

conf

DOI

10.1109/VLSIC.2014.6858387

Filename

6858387