• DocumentCode
    1831186
  • Title

    A novel CAVLC architecture for H.264 Video encoding at high bit-rate

  • Author

    Yi, Yongseok ; Song, Byung Cheol

  • Author_Institution
    Digital Media R&D Center, Samsung Electron. Co. Ltd., Seoul
  • fYear
    2008
  • fDate
    18-21 May 2008
  • Firstpage
    484
  • Lastpage
    487
  • Abstract
    In H.264/AVC and the variants, the coding of context-based adaptive variable length codes (CAVLC) is one of the demanding operations, particularly for high bitrates such as 100 Mbps. This paper presents a novel architecture that exploits component-level parallelism and pipeline techniques capable of processing high-bitrate video data in a macroblock(MB)-level pipelined CODEC architecture. Additionally, some techniques for efficient CAVLC coding is presented because CAVLC is a dominant part of the syntax coding. The resulting architecture, merged in a MB-level pipelined CODEC system, is capable of coding up to 100 Mbps bitstreams in real-time, thus, accommodating the real-time encoding of 1080p 60 Hz video.
  • Keywords
    variable length codes; video codecs; video coding; CAVLC architecture; CODEC; H.264 video encoding; bitrates; component-level parallelism; context-based adaptive variable length codes; pipeline techniques; syntax coding; variants; video data; Bit rate; Clocks; Codecs; Delay; Encoding; Engines; Frequency; Hardware; Pipeline processing; Real time systems;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on
  • Conference_Location
    Seattle, WA
  • Print_ISBN
    978-1-4244-1683-7
  • Electronic_ISBN
    978-1-4244-1684-4
  • Type

    conf

  • DOI
    10.1109/ISCAS.2008.4541460
  • Filename
    4541460