Title :
Phase estimation for grid synchronization using CORDIC algorithm with SRF-PLL
Author :
Panda, Smruti Ranjan ; Babu, B. Chitti
Author_Institution :
Dept. of Electr. Eng., Nat. Inst. of Technol., Rourkela, India
Abstract :
The proper operation of grid connected inverter system is determined by grid voltage conditions such as phase, amplitude and frequency. In such applications, an accurate and fast detection of the phase angle, amplitude and frequency of the grid voltage is essential for reference current generation. Phase angle plays an important role in control being used to transform the feedback variables to a suitable reference frame in which the control structure is implemented. Hence grid synchronization has a significant role in the control of grid connected inverter system. However, accurate on-line tracking of phase angle of the grid voltages under distorted grid condition is critical especially; during line notching, voltage unbalance, voltage dips, frequency variations etc. This paper presents phase estimation technique for grid synchronization using CORDIC algorithm with Synchronous Reference Frame-Phase Locked Loop (SRF-PLL) during unbalanced three-phase grid voltage conditions. By proposing CORDIC algorithm with SRF PLL, we can largely reduce the computational time while it will be implemented in real time platform using FPGA or DSP. Computer simulations have been carried out using MATLAB-Simulink package for feasibility of the study.
Keywords :
digital arithmetic; field programmable gate arrays; invertors; phase estimation; phase locked loops; power grids; synchronisation; CORDIC algorithm; DSP; FPGA; MATLAB-Simulink; SRF-PLL; computer simulations; grid connected inverter system; grid synchronization; grid voltages phase angle on-line tracking; phase estimation; synchronous reference frame-phase locked loop; Harmonic analysis; Phase estimation; Phase locked loops; Power harmonic filters; Simulation; Synchronization; Vectors; CORDIC Algorithm; Delay Compensator; Grid Synchronization; Normalization; Phase Estimation; Phase locked loop (PII);
Conference_Titel :
Electrical, Electronics and Computer Science (SCEECS), 2012 IEEE Students' Conference on
Conference_Location :
Bhopal
Print_ISBN :
978-1-4673-1516-6
DOI :
10.1109/SCEECS.2012.6184724