An Efficient Reconfigurable Architecture Design and Implementation of Image Contrast Enhancement Algorithm

Contrast enhancement is crucial to generating high quality images in the applications of image processing such as digital image or video photography, LCD processing, and medical image analysis. In order to achieve real-time performance for high-definition video applications, it is necessary to design efficient contrast enhancement hardware architecture to meet the needs of real-time processing. In this paper, we propose a parameter-controlled reconfigurable architecture to decrease hardware cost and improve hardware utilization for the proposed contrast enhancement algorithm. The experiment results show that the proposed method can provide the average frame rate 48.23 fps at high definition resolution 1920 × 1080 which means the proposed hardware architecture can run in real-time.