DocumentCode :
1832740
Title :
Interconnect design and limitations in nanoscale technologies
Author :
Ismail, Yehea I.
Author_Institution :
EECS Dept., Northwestern Univ., Evanston, IL
fYear :
2008
fDate :
18-21 May 2008
Firstpage :
780
Lastpage :
783
Abstract :
In this paper, the limitations posed by metallic interconnect in nano-scale technologies are discussed as well as design methodologies to deal with non-ideal interconnect. It is shown that there is a limit on how ideal an on-chip interconnect can be made independent of the how wide the wire is made. This limit is a function of the height of the interconnect, its length, and some other physical and material constants. It is also shown that it is possible to design a repeater system that results in close to speed of light propagation on narrow nanoscale wires. In addition, wider wires can be used to effectively eliminate the need for repeaters in current technologies.
Keywords :
nanotechnology; nanowires; interconnect design; interconnect limitations; metallic interconnect; nanoscale technologies; nanoscale wires; Clocks; Closed-form solution; Damping; Design methodology; Optical propagation; Productivity; Propagation delay; Repeaters; Wire; Wiring;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on
Conference_Location :
Seattle, WA
Print_ISBN :
978-1-4244-1683-7
Electronic_ISBN :
978-1-4244-1684-4
Type :
conf
DOI :
10.1109/ISCAS.2008.4541534
Filename :
4541534
Link To Document :
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