• DocumentCode
    1833130
  • Title

    Realizing high throughput transforms of H.264/AVC

  • Author

    Li, Jianjun ; Ahamdi, M.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of Windsor, Windsor, ON
  • fYear
    2008
  • fDate
    18-21 May 2008
  • Firstpage
    840
  • Lastpage
    843
  • Abstract
    This paper presents a novel high-throughput algorithm for the H.264/AVC transforms. The symmetry property of transforms in H.264/AVC has been utilized. The straight forward method merges the conventional two-stage row-column algorithm into one-stage operation. By analysis and comparison, the proposed algorithm consumes less arithmetic operations (additions and shifts) and has less latency delay. It can complete any type of transforms of H.264/AVC in only one clock cycle. Besides, its regular processing element is reconfigurable. This method is suitable for reconfigurable hardware implementation.
  • Keywords
    delays; video coding; H.264-AVC transforms; clock cycle; less latency delay; one-stage operation; reconfigurable hardware implementation; regular processing element; straight forward method; two-stage row-column algorithm; Algorithm design and analysis; Arithmetic; Automatic voltage control; Decoding; Delay; Discrete cosine transforms; Image coding; Throughput; Transform coding; Video compression;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on
  • Conference_Location
    Seattle, WA
  • Print_ISBN
    978-1-4244-1683-7
  • Electronic_ISBN
    978-1-4244-1684-4
  • Type

    conf

  • DOI
    10.1109/ISCAS.2008.4541549
  • Filename
    4541549