DocumentCode :
1833342
Title :
A tool for describing and evaluating hierarchical real-time bus scheduling policies
Author :
Meyerowitz, Trevor ; Pinello, Claudio ; Sangiovanni-Vincetelli, A.
Author_Institution :
UC, Berkeley, CA, USA
fYear :
2003
fDate :
2-6 June 2003
Firstpage :
312
Lastpage :
317
Abstract :
We present a tool suite for building, simulating, and analyzing the results of hierarchical tree-like structure descriptions of the scheduling policy for modules sharing a bus in real-time applications. These schedules can be based on a variety of factors including characteristics of messages and time slicing and are represented in a hierarchical tree-like structure that specifies multiple levels of arbitration. This structure can describe many popular arbitration schemes. Our simulator evaluates the specified scheduling structure on a set of message traces for a given bus. We illustrate our approach by applying it to two examples: the SAE automotive benchmark and Voice over IP (VoIP). Although this paper deals with just bus scheduling policies, the approach can be easily extended to other real-time scheduling problems.
Keywords :
embedded systems; hierarchical systems; performance evaluation; processor scheduling; system buses; bus message traces; bus scheduling; design tool; hierarchical tree-like structure; message characteristics; multiple level arbitration; real-time application; scheduling policy; scheduling structure; structure descriptions; time slicing; Analytical models; Automotive engineering; Buildings; Design automation; Job shop scheduling; Permission; Processor scheduling; Quality of service; Space exploration; Vehicle dynamics;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2003. Proceedings
Print_ISBN :
1-58113-688-9
Type :
conf
DOI :
10.1109/DAC.2003.1219015
Filename :
1219015
Link To Document :
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