Title :
0.60 μm pitch metal integration in 0.25 μm technology
Author :
DeBord, J.R.D. ; Jayaraman, V. ; Hewson, M. ; Lee, W. ; Nair, S. ; Shimada, H. ; Linh, V.L. ; Robbins, J. ; Sivasothy, A.
Author_Institution :
Texas Instrum. Inc., Dallas, TX, USA
Abstract :
As metal pitch requirements dip below 0.70 μm, 248 nm deep ultraviolet (DUV) lithography becomes a necessity for random logic metallization. The migration to DUV requires the development of new ARC materials with low reflectivity and low chemical reactivity with the DUV resists, as well as the development of new ARC etch and metal etch processes. This work discusses a manufacturable 0.60 μm pitch metallization scheme for advanced logic applications incorporating DUV lithography, an inorganic silicon oxynitride (SiON) anti-reflective coating (ARC) layer and standard etch chemistries. Results were characterized by SEM cross-sections and electrical data from parametric test structures
Keywords :
antireflection coatings; etching; integrated circuit interconnections; integrated circuit metallisation; integrated circuit testing; integrated logic circuits; photoresists; reflectivity; scanning electron microscopy; surface chemistry; ultraviolet lithography; 0.25 micron; 0.6 micron; 0.7 micron; 248 nm; ARC etch process; ARC materials; DUV lithography; DUV resists; SEM cross-sections; SiON; chemical reactivity; deep ultraviolet lithography; electrical data; etch chemistry; inorganic SiON ARC layer; inorganic silicon oxynitride anti-reflective coating layer; logic applications; metal etch process; metal integration; metal pitch; metallization; parametric test structures; random logic metallization; reflectivity; Chemical processes; Chemical technology; Etching; Inorganic materials; Lithography; Logic; Manufacturing; Metallization; Reflectivity; Resists;
Conference_Titel :
Interconnect Technology Conference, 1998. Proceedings of the IEEE 1998 International
Conference_Location :
San Francisco, CA
Print_ISBN :
0-7803-4285-2
DOI :
10.1109/IITC.1998.704907
