A soft error improved 7 ns/2.1-W GaAs 16-kb SRAM

Author

Matsue, S. ; Makino, H. ; Noda, M. ; Tanino, N. ; Takano, S. ; Nishitani, K. ; Kayano, S.

Author_Institution

Mitsubishi Electr. Corp., Itami, Japan

fYear

1989

fDate

22-25 Oct. 1989

Firstpage

41

Lastpage

44

Abstract

A GaAs 4 K*4 b SRAM (static RAM) with improved alpha particle immunity is presented. By using a novel circuit technology and a buried p-layer FET, the critical charge of the memory cell has been increased and the collected charge decreased. The soft error rate of a 16-kb SRAM is reduced by about four orders of magnitude compared to that of a GaAs 4-kb SRAM consisting of conventional memory cells; it is also less than that of the commercially available silicon 1-kb ECL RAM. An address access time of 7.0 ns with 2.1-W power dissipation has been obtained at 75 degrees C. The RAM operates at the single supply voltage of 1.8 V.<>

Keywords

III-V semiconductors; errors; field effect integrated circuits; gallium arsenide; integrated memory circuits; radiation hardening (electronics); random-access storage; 1.8 V; 16 kbit; 2.1 W; 7 ns; GaAs; MESFET process; SRAM; address access time; alpha particle immunity; buried p-layer FET; memory cell; power dissipation; single supply voltage; soft error improvement; soft error rate; static RAM; Alpha particles; Circuits; Error analysis; FETs; Gallium arsenide; Power dissipation; Random access memory; Read-write memory; Silicon; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 1989. Technical Digest 1989., 11th Annual

Conference_Location

San Diego, CA, USA

Type

conf

DOI

10.1109/GAAS.1989.69289

Filename

69289