Title :
20Gb/s 1/4-rate and 40Gb/s 1/8-rate burst-mode CDR circuits in 0.13 μm CMOS
Author :
Chu, Hong-Lin ; Hsieh, Chang-Lin ; Liu, Shen-Iura
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei
Abstract :
In this paper, 20 Gb/s 1/4-rate and 40 Gb/s 1/8-rate burst-mode clock and data recovery (BMCDR) circuits are presented. The proposed inductorless gated digitally-controlled oscillator using a digitally frequency calibration loop is presented. These two BMCDR circuits have been fabricated in 0.13..m CMOS technology. For a PRBS of 27-1, the measured peak-to-peak jitter of the recovered clock for the 20 Gb/s 1/4-rate and 40 Gb/s 1/8-rate BMCDR circuits is 23.8 ps and 51 ps, respectively.
Keywords :
CMOS integrated circuits; optical fibre networks; CMOS; burst-mode CDR circuits; burst-mode clock and data recovery circuits; inductorless gated digitally-controlled oscillator; Application specific integrated circuits; CMOS technology; Calibration; Clocks; Frequency locked loops; Integrated circuit technology; Jitter; Oscillators; Q measurement; Solid state circuits;
Conference_Titel :
Solid-State Circuits Conference, 2008. A-SSCC '08. IEEE Asian
Conference_Location :
Fukuoka
Print_ISBN :
978-1-4244-2604-1
Electronic_ISBN :
978-1-4244-2605-8
DOI :
10.1109/ASSCC.2008.4708819
