DocumentCode
1834546
Title
2GHz CMOS noise cancellation VCO
Author
Bansal, Amit ; Heng, Chun-Huat ; Zheng, Yuan-Jin
Author_Institution
Dept. of Electr. & Comput. Eng., Nat. Univ. of Singapore, Singapore
fYear
2008
fDate
3-5 Nov. 2008
Firstpage
461
Lastpage
464
Abstract
A 2 GHz CMOS VCO, employing noise cancellation to eliminate flicker noise up-conversion, has been fabricated in 0.35 mum CMOS. An overall phase noise reduction of 10 dB has been measured with the proposed technique, and phase noise of -121.6 dBc/Hz@500 kHz offset has been achieved. The VCO core consumes 2.8 mA under 2.4V supply and occupies an area of 0.7 mmtimes0.8 mm. The proposed VCO measured FOM of -186 dBc/Hz.
Keywords
CMOS integrated circuits; microwave oscillators; phase noise; voltage-controlled oscillators; CMOS noise cancellation VCO; frequency 2 GHz; phase noise reduction; size 0.35 mum; voltage controlled oscillator; 1f noise; MOS devices; Noise cancellation; Noise measurement; Noise reduction; Phase measurement; Phase noise; Tail; Virtual colonoscopy; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2008. A-SSCC '08. IEEE Asian
Conference_Location
Fukuoka
Print_ISBN
978-1-4244-2604-1
Electronic_ISBN
978-1-4244-2605-8
Type
conf
DOI
10.1109/ASSCC.2008.4708827
Filename
4708827
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