Title :
Measurement and modeling of high-speed interconnect-limited digital ring oscillators: The effect of dielectric anisotropy
Author :
Garg, A. ; Le Coz, Y.L. ; Greub, H.J. ; McDonald, J.F. ; Iverson, R.B.
Author_Institution :
Center for Integrated Electron., Rensselaer Polytech. Inst., Troy, NY, USA
Abstract :
IC interconnect characterization is growing in importance as devices become faster and smaller. Accurate numerical extraction of 3D interconnect capacitance is essential for achieving design targets in the multi-GHz digital regime. An AlGaAs-GaAs heterojunction-bipolar-transistor test chip was fabricated. The chip used 3-level metal with anisotropic polyimide interlevel dielectrics. Full differential current-mode logic circuit technology was employed. The chip contained a variety of interconnect capacitor structures (parallel plate, finger, crossover) and interconnect-limited ring-oscillator circuits. Capacitance and oscillator frequency measurements were performed to compare with CAD-tool predictions. Good agreement with measurements was achieved with an independently obtained 25% uniaxial polyimide dielectric anisotropy. Measured and predicted results for the capacitor test structures generally agreed to within 2%. Predicted ring-oscillator periods were within 4% of measurement
Keywords :
III-V semiconductors; MMIC oscillators; aluminium compounds; bipolar logic circuits; capacitance; capacitors; circuit CAD; circuit analysis computing; current-mode logic; dielectric thin films; gallium arsenide; heterojunction bipolar transistors; integrated circuit interconnections; integrated circuit measurement; integrated circuit metallisation; integrated circuit modelling; integrated logic circuits; logic CAD; polymer films; 3D interconnect capacitance; AlGaAs-GaAs; AlGaAs-GaAs heterojunction-bipolar-transistor test chip; CAD-tool predictions; IC interconnect characterization; anisotropic polyimide interlevel dielectrics; capacitance measurements; capacitor test structures; crossover interconnect capacitor structure; design targets; dielectric anisotropy; differential current-mode logic circuit technology; digital ring oscillators; finger interconnect capacitor structure; high-speed interconnect-limited digital ring oscillators; interconnect capacitor structures; interconnect-limited ring-oscillator circuits; modeling; numerical extraction; oscillator frequency measurements; parallel plate interconnect capacitor structure; ring-oscillator periods; three-level metallization; uniaxial polyimide dielectric anisotropy; Anisotropic magnetoresistance; Capacitance; Capacitors; Circuit testing; Dielectric measurements; Fingers; Integrated circuit interconnections; Logic circuits; Polyimides; Semiconductor device measurement;
Conference_Titel :
Interconnect Technology Conference, 1998. Proceedings of the IEEE 1998 International
Conference_Location :
San Francisco, CA
Print_ISBN :
0-7803-4285-2
DOI :
10.1109/IITC.1998.704910
