The power-saving approach by critical section detections of multi-cores embedded systems

The use of multi-threading and multi-cores leads to performance improvements of embedded systems. On the other hand, the power consumption increases due to the use of more processors. The energy wastages could be critical in embedded systems with limited resources. Therefore, the issues of performance and power-saving are important for multithreaded applications which are executed on multi-cores embedded systems. The dynamic CPU frequency leveling which is based on critical section detections is proposed in this paper. Based on this approach, the energy wastages are reduced significantly with the maintenances of performance at the same time. The results indicate the battery life of multi-cores embedded systems can be extended by proposed power-saving approach effectively.