• DocumentCode
    1834912
  • Title

    A novel self aligned VDMOS device

  • Author

    Li, Kaicheng

  • Author_Institution
    Sichuan Inst. of Solid-State Circuit, Minist. of the Electron. Ind., Chongqing, China
  • fYear
    1995
  • fDate
    24-28 Oct 1995
  • Firstpage
    479
  • Lastpage
    481
  • Abstract
    In this paper, novel self aligned vertical double diffused metal oxide semiconductor (SAVDMOS) transistors with technological improvements, are described. The fillet structures of silicon dioxide have been formed in order to achieve the self alignment of titanium disilicide. Their maximum breakdown voltages are 210 V. The I-V characteristics of the devices are satisfactory
  • Keywords
    electric breakdown; etching; power MOSFET; sputter deposition; 210 V; I-V characteristics; SAVDMOS transistors; TiSi2-SiO2-Si; breakdown voltages; fillet structures; self aligned VDMOS device; vertical double diffused; Circuits; Conductivity; Electric breakdown; Sputter etching; Titanium;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State and Integrated Circuit Technology, 1995 4th International Conference on
  • Conference_Location
    Beijing
  • Print_ISBN
    0-7803-3062-5
  • Type

    conf

  • DOI
    10.1109/ICSICT.1995.503324
  • Filename
    503324
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1834912