Modeling the influence of streaming instructions on video encoding time using Petri nets

Author

Debes, Eric ; Chopard, Frèdèric

Author_Institution

Microprocessor Res. Labs., Intel Corp., Santa Clara, CA, USA

fYear

2001

fDate

2001

Firstpage

549

Lastpage

554

Abstract

For optimized MPEG video software encoders, data transfers in the memory hierarchy of current PC workstations is one of the main bottleneck. In order to hide the latency of memory loads, new instructions have been added to the latest generations of general purpose processors. We propose to model data prefetching in the memory hierarchy using Petri nets and to simulate the execution of MPEG encoding using a computer aided Petri net based simulation tool. The results show that the use of prefetching instructions for video encoding makes it possible to compensate for slower caches and for slower bus speed

Keywords

Petri nets; cache storage; data compression; digital simulation; general purpose computers; memory architecture; microcomputer applications; video coding; workstations; PC workstations; bus speed; cache storage; computer aided Petri net based simulation tool; data prefetching; data transfer; general purpose processors; memory hierarchy; memory load latency; optimized MPEG video software encoders; streaming instructions influence modeling; video encoding time; Computational modeling; Computer simulation; Delay; Encoding; Mathematical model; Microprocessors; Petri nets; Prefetching; Streaming media; Video signal processing;

fLanguage

English

Publisher

ieee

Conference_Titel

Multimedia Signal Processing, 2001 IEEE Fourth Workshop on

Conference_Location

Cannes

Print_ISBN

0-7803-7025-2

Type

conf

DOI

10.1109/MMSP.2001.962790

Filename

962790