DocumentCode :
1835194
Title :
Vector potential equivalent circuit based on PEEC inversion
Author :
Yu, Hao ; He, Lei
Author_Institution :
Dept. of Electr. Eng., Univ. of California, Los Angeles, CA, USA
fYear :
2003
fDate :
2-6 June 2003
Firstpage :
718
Lastpage :
723
Abstract :
The geometry-integration based vector potential equivalent circuit (VPEC) was introduced to obtain a localized circuit model for inductive interconnects in A. Pacelli (2002). In this paper, we show that the method in A. Pacelli (2002) is accurate only for two-body problem. We derive N-body VPEC models based on geometry integration and inversion of the inductance matrix under the PEEC model, respectively. Both VPEC models are derived from first principles and are accurate compared to the full PEEC model. The resulting circuit matrix Gˆ can be analyzed directly by existing simulation tools such as SPICE, and the simulation time of VPEC model is 47X less than that for PEEC model for a bus structure with 256 wires. It is also passive and strictly diagonal dominant, which leads to efficient circuit sparsification methods such as numerical and geometry based sparsifications. Compared to the full PEEC model, the sparsified VPEC models are orders of magnitude faster and produce waveforms with very small error.
Keywords :
SPICE; equivalent circuits; inductance; integrated circuit interconnections; integrated circuit modelling; integration; matrix inversion; N-body VPEC model; PEEC inversion; SPICE; bus structure; circuit matrix; circuit sparsification method; diagonal dominant; geometry based sparsification; geometry integration; inductance matrix inversion; inductive interconnect; localized circuit model; numerical based sparsification; partial element equivalent circuit; simulation program with integrated circuit emphasis; simulation time; vector potential equivalent circuit; Circuit analysis; Circuit simulation; Equivalent circuits; Inductance; Integrated circuit interconnections; RLC circuits; SPICE; Solid modeling; Sparse matrices; Wires;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2003. Proceedings
Print_ISBN :
1-58113-688-9
Type :
conf
DOI :
10.1109/DAC.2003.1219113
Filename :
1219113
Link To Document :
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