DocumentCode :
1835316
Title :
Power optimization of weighted bit-product summation tree for elementary function generator
Author :
Oskuii, Saeeid Tahmasbi ; Johansson, Kenny ; Gustafsson, Oscar ; Kjeldsberg, Per Gunnar
Author_Institution :
Dept. of Electron. & Telecommun., Norwegian Univ. of Sci. & Technol. (NTNU), Trondheim
fYear :
2008
fDate :
18-21 May 2008
Firstpage :
1240
Lastpage :
1243
Abstract :
In this paper we propose a method for lowering the power consumption in our previously proposed method for approximating elementary functions. By rearranging the interconnect ordering in the summation tree we show that it is possible to lower the power consumption in the range of 5.4 % to 25.6% compared to a random ordering. The reduction tree is progressively designed and the interconnect ordering is decided based on the transition activities of the partial products. The reduction in power consumption comes with no overhead in performance or area compared to the random ordering.
Keywords :
energy conservation; function generators; optimisation; power consumption; trees (mathematics); elementary function generator; power consumption reduction; power optimization; random ordering; weighted bit-product summation tree; Application software; Computer architecture; Discrete cosine transforms; Energy consumption; Frequency synthesizers; Function approximation; Network synthesis; Optimization methods; Signal generators; Telecommunication switching;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on
Conference_Location :
Seattle, WA
Print_ISBN :
978-1-4244-1683-7
Electronic_ISBN :
978-1-4244-1684-4
Type :
conf
DOI :
10.1109/ISCAS.2008.4541649
Filename :
4541649
Link To Document :
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