DocumentCode
1835328
Title
High speed interconnects on SOI substrates
Author
Plettner, A. ; Haberger, K. ; Englmaier, A. ; Hartmann, H.
Author_Institution
Corp. Res. & Dev., Siemens AG, Munich, Germany
fYear
1995
fDate
24-28 Oct 1995
Firstpage
535
Lastpage
537
Abstract
A buried and highly conductive layer beneath the silicon surface is used to improve the shielding of the interconnects and to facilitate the transmission of high speed signals. The technology is based on the Bonded Etch-back Silicon On Insulator (BESOI) technique. No additional mask level is required and design freedom is hardly limited
Keywords
CMOS integrated circuits; buried layers; integrated circuit interconnections; integrated circuit measurement; silicon-on-insulator; wafer bonding; BESOI; CMOS design; SOI substrates; Si; Si surface; buried highly conductive layer; high speed interconnects; high speed signal transmission; interconnect shielding; wafer bonding technique; Crosstalk; Electric variables measurement; Electrical resistance measurement; Energy measurement; Oxidation; Semiconductor films; Silicon; Substrates; Thickness measurement; Wafer bonding;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuit Technology, 1995 4th International Conference on
Conference_Location
Beijing
Print_ISBN
0-7803-3062-5
Type
conf
DOI
10.1109/ICSICT.1995.503342
Filename
503342
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