DocumentCode
1835433
Title
Trying to Unify the LL/SC Synchronization Primitive and the Notion of a Timed Register
Author
Imbs, Damien ; Raynal, Michel
Author_Institution
Inst. Univ. de France, France
fYear
2012
fDate
26-29 March 2012
Firstpage
326
Lastpage
330
Abstract
The aim of this short paper is to show that both the LL/SC (Linked Load/Store Conditional) synchronization primitive and the notion of a Timed register can be seen as two instances of a general abstract synchronization object type that we called a predicate-based read/write synchronization object. More precisely, LL/SC corresponds to its time-free instance while a timed register corresponds to its timed instance. It follows that the notion of a predicate-based read/write synchronization object constitutes a unifying notion that allows for a deeper insight into synchronization objects proposed for multicore architectures.
Keywords
multiprocessing systems; synchronisation; LL-SC synchronization primitive; abstract synchronization object type; linked load-store conditional synchronization; multicore architecture; predicate-based read-write synchronization object; time-free instance; timed instance; timed register notion; Computer crashes; Detectors; Distributed computing; Presses; Registers; Semantics; Synchronization; Asynchronous shared memory system; Atomicity; Compare swap; Consensus object; Linked Load/Store Conditional; Modularity; Multicore; Process crash; Read/Write atomic register; Synchronization objects; Timed registers; Wait-free algorithm;
fLanguage
English
Publisher
ieee
Conference_Titel
Advanced Information Networking and Applications (AINA), 2012 IEEE 26th International Conference on
Conference_Location
Fukuoka
ISSN
1550-445X
Print_ISBN
978-1-4673-0714-7
Type
conf
DOI
10.1109/AINA.2012.35
Filename
6184888
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