DocumentCode
1835625
Title
Integrated balun design for dual-band WLAN a/b/g applications
Author
Lu, Chao ; Charlon, Olivier ; Bracey, Mark ; Pham, Anh-Vu H.
Author_Institution
NXP Semicond. USA, Inc., San Jose, CA
fYear
2008
fDate
18-21 May 2008
Firstpage
1296
Lastpage
1299
Abstract
This paper presents an integrated balun design optimized for low insertion loss and minimal imbalance. The concept of an integrated dual-band balun is proposed to significantly improve the integration and reliability of WLAN a/b/g transceivers. The design has been implemented in standard 90nm CMOS technology. The measured minimum insertion loss (ILmin) is 1.6 dB in the 2.4 GHz band, and 1.2 dB at 5.6 GHz. The measured phase imbalance is less than 0.4deg, and the amplitude imbalance is below 0.1 dB, in both frequency bands. Attributed to its symmetry, the balun yields more than 40 dB attenuation of undesired mode conversions. The balun core occupies 220 mum x 220 mum, and has the lowest measured insertion loss reported to date for integrated baluns in standard CMOS.
Keywords
CMOS integrated circuits; baluns; network synthesis; telecommunication network reliability; transceivers; wireless LAN; CMOS technology; WLAN transceivers; dual-band WLAN applications; frequency 2.4 GHz; frequency 5.6 GHz; integrated balun design; loss 1.2 dB; loss 1.6 dB; low insertion loss; minimal imbalance; CMOS technology; Design optimization; Dual band; Frequency measurement; Impedance matching; Insertion loss; Loss measurement; Phase measurement; Transceivers; Wireless LAN;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on
Conference_Location
Seattle, WA
Print_ISBN
978-1-4244-1683-7
Electronic_ISBN
978-1-4244-1684-4
Type
conf
DOI
10.1109/ISCAS.2008.4541663
Filename
4541663
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