DocumentCode :
1835800
Title :
A poly-silicon TFT model for circuit simulation
Author :
Guan, Xudong ; Liu, Xiaoyan ; Han, Ruqi
Author_Institution :
Inst. of Microelectron., Beijing Univ., China
fYear :
1995
fDate :
24-28 Oct 1995
Firstpage :
604
Lastpage :
606
Abstract :
This paper presents a polysilicon thin film transistor (TFT) model for circuit simulation. In this model, the effects of grain boundaries on the turn-on behavior of polysilicon TFT is considered. The potential barrier height is expressed in terms of channel doping, gate oxide thickness, grain size and external gate biases. Based on this, the analytical I-V characteristics are obtained for circuit simulation. Comparisons between the model and the experimental data have been made
Keywords :
circuit analysis computing; elemental semiconductors; grain boundaries; semiconductor device models; silicon; thin film transistors; I-V characteristics; Si; analytical model; channel doping; circuit simulation; external gate bias; gate oxide thickness; grain boundaries; grain size; polysilicon thin film transistor; potential barrier height; turn-on behavior; Capacitance; Circuit simulation; Doping; Grain boundaries; Grain size; Intrusion detection; MOSFET circuits; Semiconductor process modeling; Thin film transistors; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State and Integrated Circuit Technology, 1995 4th International Conference on
Conference_Location :
Beijing
Print_ISBN :
0-7803-3062-5
Type :
conf
DOI :
10.1109/ICSICT.1995.503365
Filename :
503365
Link To Document :
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