DocumentCode :
1835840
Title :
Statistical estimation of leakage-induced power grid voltage drop considering within-die process variations
Author :
Ferzli, Imad A. ; Najm, Farid N.
Author_Institution :
Dept. of ECE, Toronto Univ., Ont., Canada
fYear :
2003
fDate :
2-6 June 2003
Firstpage :
856
Lastpage :
859
Abstract :
Transistor threshold voltages (Vth) have been reduced as part of on-going technology scaling. The smaller Vth values feature increased fluctuations due to process variations, with a strong within-die component. Correspondingly, given the exponential dependence of leakage on Vth, circuit leakage currents are increasing significantly and have strong within-die statistical variations. With these currents loading the power grid, the grid develops large voltage drops, which is an unavoidable background level of noise on the grid. We develop techniques for estimation of the statistics of the leakage-induced power grid voltage drop based on given statistics of the circuit leakage currents.
Keywords :
MOS integrated circuits; integrated circuit design; integrated circuit noise; leakage currents; statistical analysis; circuit leakage current; leakage-induced voltage drop; noise background level; power grid voltage drop; statistical estimation; technology scaling; transistor threshold voltage; within-die component; within-die process variation; Algorithm design and analysis; Background noise; Circuits; Fluctuations; Leakage current; MOSFETs; Permission; Power grids; Statistics; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2003. Proceedings
Print_ISBN :
1-58113-688-9
Type :
conf
DOI :
10.1109/DAC.2003.1219139
Filename :
1219139
Link To Document :
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