DocumentCode
1835990
Title
VLSI implementation of a shift-enabled reconfigurable array
Author
Miller, Scott ; Sima, Mihai ; McGuire, Michael
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of Victoria, Victoria, BC
fYear
2008
fDate
18-21 May 2008
Firstpage
1360
Lastpage
1363
Abstract
We describe the implementation of a coarse-grain reconflgurable array that implements shift operations within its interconnection network. The connection point of such an array is a triangular matrix of switches. The reconflgurable array is geared toward the implementation of sequential Shift-and- Add algorithms. We show that a triangular switch-box that uses a level-restoring buffer with an unfolded multiplexer exhibits improved propagation delay and power consumption against prior art. This leads to a coarse-grain reconflgurable array that efficiently implements transcendental functions.
Keywords
VLSI; reconfigurable architectures; VLSI; coarse-grain reconfigurable array; level-restoring buffer; sequential shift-and-add algorithm; triangular switch-box; Energy consumption; Iterative algorithms; Multiplexing; Multiprocessor interconnection networks; Propagation delay; Signal processing algorithms; Switches; Switching circuits; Tiles; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on
Conference_Location
Seattle, WA
Print_ISBN
978-1-4244-1683-7
Electronic_ISBN
978-1-4244-1684-4
Type
conf
DOI
10.1109/ISCAS.2008.4541679
Filename
4541679
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