• DocumentCode
    1836481
  • Title

    FPGA-based combined architecture for stream categorization and intrusion detection

  • Author

    Shukla, Sunil ; Rabbah, Rodric ; Vorbach, Martin

  • Author_Institution
    T.J. Watson Res. Center, IBM Res., Yorktown Heights, NY, USA
  • fYear
    2010
  • fDate
    26-28 July 2010
  • Firstpage
    77
  • Lastpage
    80
  • Abstract
    This paper presents a working solution for the MEMOCODE 2010 design contest. The design presented in this paper is implemented in the Xilinx V5LX330 FPGA as a custom circuit. The solution implements pattern matching logic for all the mandatory and optional patterns while maintaining the required line rate of 500 Mbps.
  • Keywords
    field programmable gate arrays; pattern matching; security of data; FPGA-based combined architecture; MEMOCODE 2010 design; Xilinx V5LX330 FPGA; bit rate 500 Mbit/s; intrusion detection; pattern matching logic; stream categorization; Benchmark testing; Clocks; Computer aided manufacturing; Doped fiber amplifiers; Field programmable gate arrays; Pattern matching; Random access memory; DFA; FPGA; pattern matching;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Formal Methods and Models for Codesign (MEMOCODE), 2010 8th IEEE/ACM International Conference on
  • Conference_Location
    Grenoble
  • Print_ISBN
    978-1-4244-7885-9
  • Electronic_ISBN
    978-1-4244-7886-6
  • Type

    conf

  • DOI
    10.1109/MEMCOD.2010.5558652
  • Filename
    5558652
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1836481