DocumentCode :
1836579
Title :
An Efficient FPGA Design of PingPong-128 Stream Cipher for Secure Computing
Author :
Choudhury, Amlan Jyoti ; Lim, Hyotaek ; Lee, Hoon-Jae
Author_Institution :
Dept. of Ubiquitous IT, Dongseo Univ., Busan, South Korea
fYear :
2012
fDate :
26-29 March 2012
Firstpage :
695
Lastpage :
700
Abstract :
PingPong-128 stream cipher is a 128 bit key stream generator with 257 internal states. It provides irregular clocking by mutual clock control mechanism and hence, provides significant immunity against existing attacks. However, hardware implementation of PingPong-128 is also essential for fast ubiquitous application. This paper proposes an FPGA based hardware implementation of PingPong-128 stream cipher in Cyclone II (Alter a Quartus II) processor. The proposed design also examines the performance analysis of PingPong-128 cipher in Quarts II 9.1 web edition and achieves efficiency.
Keywords :
clocks; cryptography; field programmable gate arrays; ubiquitous computing; Altera Quartus II processor; Cyclone II processor; FPGA design; PingPong-128 stream cipher; Quarts II 9.1 Web edition; computing security; irregular clocking; key stream generator; mutual clock control mechanism; ubiquitous application; word length 128 bit; Clocks; Equations; Generators; Hardware; Mathematical model; Multiplexing; Synchronization; Clock Control; FPGA; LFSR; PingPong-128; Stream Cipher;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Advanced Information Networking and Applications (AINA), 2012 IEEE 26th International Conference on
Conference_Location :
Fukuoka
ISSN :
1550-445X
Print_ISBN :
978-1-4673-0714-7
Type :
conf
DOI :
10.1109/AINA.2012.24
Filename :
6184937
Link To Document :
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